IBM’s 5nm chip could quadruple battery life
IBM, in partnership with Samsung and GlobalFoundries (which manufactures chips for Qualcomm and AMD, among others), has developed a process for building 5nm chips. Two years ago IBM unveiled a 7nm process, and Samsung will likely ship 7nm chips next year, but today’s announcement sounds like an even more important breakthrough in chip design.
The 5nm chip uses a “gate-all-around” transistor (GAAFET), with the gate material wrapped around a trio of horizontal silicon “nanosheets,” as compared to the vertical fin design (FinFET) that’s used in current state-of-the-art chips. IBM claims that FinFET could possibly scale down to 5nm, but there’s a performance ceiling on that design due to the limits of current…
